During Intel’s virtual Architecture Day 2020, held late last month, the GM of Intel’s devices development group, Boyd Phelps, provided details on both the Tiger Lake system on chip (SoC) and its CPU, codenamed Willow Cove.
“When we started the Tiger Lake journey, we did so with an ambitious set of specific goals,” Phelps said. “We have delivered on those ambitions…we’ve delivered unprecedented leaps in performance.”
Intel’s Boyd Phelps: “We’ve delivered unprecedented leaps in performance”
Those goals, as outlined by Phelps, included:
> Greater than generational performance gain in CPU
> Disruptive performance in integrated graphics
> Scalable AI
> Increased memory and fabric efficiency
> Best-in-class set of IPs
> Security advances
So how did Intel incorporate all that into Tiger Lake? Here are 7 ways:
Transistor: The 11th gen Core processor has a new CPU, Willow Cove, that was built on the foundation of Intel’s Sunny Cove architecture. Yet at any voltage, it outperforms the older CPU. In addition, Intel redesigned the caching to handle emerging workloads.
Xe graphics: Tiger Lake’s GPU offers big improvements in performance/watt efficiency; a 3.8MB L3 cache; and an increase in execution units from 64 to 96. To handle that, Intel also increased the CPU’s memory and fabric for high bandwidth.
Gaussian and Neural Accelerator (GNA 2.0): This compute engine is designed for applications such as meeting transcription and translation. It uses neural noise cancellation for high dynamic range noise. And it has been designed to lower CPU utilization on GNA by 20%.
Displays: Tiger Lake supports more displays at higher resolution. As this requires higher bandwidth, Intel created a 64-byte dedicated data path from memory to display. Known as the Display Isoch Port, it supports up to 64 GB/sec. of bandwidth.
Imaging: On Tiger Lake, it’s now fully supported in hardware. The new SoC supports up to 6 sensors for video up to 4K90 resolution and still images up to 42 megapixels.
I/O: Tiger Lake introduces integrated Thunderbolt 4 and USB 4 connectivity. It also includes PCIe Gen4 lanes that allow direct SSDs attached to the CPU without having to go through the PCH (platform controller hub). Boyd said this is great for high-speed storage as well as attaching graphics cards.
Power management: Tiger Lake uses “autonomous DVFS” – this dynamically matches the SoC’s frequency and voltage to the bandwidth of the workload being done, delivering the most power-efficient operation. In addition, other areas were redesigned to reduce power consumption; this included moving some always-on logic to gated domains.